STM32U585CIU6Q

Key features

• Includes ST state-of-the-art patented technology
• Ultra-low-power with FlexPowerControl
• 1.71 V to 3.6 V power supply
• -40 ℃ to +85/125 ℃ temperature range
• Low-power background autonomous mode (LPBAM): autonomous peripherals with DMA, functional down to Stop 2 mode
• VBAT mode: supply for RTC, 32x32-bit backup registers and 2-Kbyte backup SRAM
• 160 nA Shutdown mode (24 wake-up pins)
• 210 nA Standby mode (24 wake-up pins)
• 530 nA Standby mode with RTC
• 1.9 μA Stop 3 mode with 16-Kbyte SRAM
• 4.3 μA Stop 3 mode with full SRAM
• 4.0 μA Stop 2 mode with 16-Kbyte SRAM
• 8.95 μA Stop 2 mode with full SRAM
• 19.5 μA/MHz Run mode @ 3.3 V
• Arm 32-bit Cortex-M33 CPU with TrustZone, MPU, DSP, and FPU
• ART Accelerator: 8-Kbyte instruction cache allowing 0-wait-state execution from flash and external memories: up to 160 MHz, 240 DMIPS; 4-Kbyte data cache for external memories
• Power management: Embedded regulator (LDO) and SMPS step-down converter supporting switch on-the-fly and voltage scaling
• Benchmarks: 1.5 DMIPS/MHz (Drystone 2.1); 651 CoreMark (4.07 CoreMark/MHz); 450 ULPMark-CP; 109 ULPMark-PP; 51.5 ULPMark-CM; 133000 SecureMark-TLS
• Memories: 2-Mbyte flash memory with ECC, 2 banks read-while-write, including 512 Kbytes with 100 kcycles; 786-Kbyte SRAM with ECC OFF or 722-Kbyte SRAM including up to 322-Kbyte SRAM with ECC ON; External memory interface supporting SRAM, PSRAM, NOR, NAND, and FRAM memories; 2 Octo-SPI memory interfaces
• Security and cryptography: SESIP3 and PSA Level 3 Certified Assurance Target; Arm TrustZone and securable I/Os, memories, and peripherals; Flexible life cycle scheme with RDP and password protected debug; Root of trust thanks to unique boot entry and secure hide protection area (HDP); Secure firmware installation (SFI) thanks to embedded root secure services (RSS); Secure data storage with hardware unique key (HUK); Secure firmware upgrade support with TF-M; 2 AES coprocessors including one with DPA resistance; Public key accelerator, DPA resistant; On-the-fly decryption of Octo-SPI external memories; HASH hardware accelerator; True random number generator, NIST SP800-90B compliant; 96-bit unique ID; 512-byte OTP (one-time programmable); Active tampers
• Clock management: 4 to 50 MHz crystal oscillator; 32 kHz crystal oscillator for RTC (LSE); Internal 16 MHz factory-trimmed RC (±1%); Internal low-power 32 kHz RC (±5%); 2 internal multispeed 100 kHz to 48 MHz oscillators, including one autotrimmed by LSE (better than ±0.25% accuracy); Internal 48 MHz with clock recovery; 3 PLLs for system clock, USB, audio, ADC
• General-purpose input/outputs: Up to 136 fast I/Os with interrupt capability, most 5V-tolerant and up to 14 I/Os with independent supply down to 1.08 V
• Up to 17 timers and 2 watchdogs: 2 16-bit advanced motor-control, 4 32-bit, 5 16-bit, 4 low-power 16-bit (available in Stop mode), 2 SysTick timers and 2 watchdogs; RTC with hardware calendar and calibration
• Up to 22 communication peripherals: 1 USB Type-C, USB power delivery controller; 1 USB OTG 2.0 full-speed controller; 2 SAIs (serial audio interface); 4 I2C FM+(1 Mbit/s), SMBus/PMBus; 6 USARTs (ISO 7816, LIN, IrDA, modem); 3 SPIs (5x SPIs with the dual OCTOSPI); 1 CAN FD controller; 2 SDMMC interfaces; 1 multifunction digital filter (6 filters); 1 audio digital filter with sound-activity detection; Parallel synchronous slave interface
• 16- and 4-channel DMA controllers, functional in Stop mode
• Graphic features: Chrom-ART Accelerator (DMA2D) for enhanced graphic content creation; 1 digital camera interface
• Mathematical coprocessor: CORDIC for trigonometric functions acceleration; Filter mathematical accelerator (FMAC)
• Up to 22 capacitive sensing channels: Support touch key, linear, and rotary touch sensors
• Rich analog peripherals (independent supply): 14-bit ADC 2.5-Msps with hardware oversampling; 12-bit ADC 2.5-Msps, with hardware oversampling, autonomous in Stop 2 mode; 2 12-bit DAC, low-power sample and hold; 2 operational amplifiers with built-in PGA; 2 ultra-low-power comparators
• CRC calculation unit
• Debug: Development support: serial-wire debug (SWD), JTAG, Embedded Trace Macrocell (ETM)
• ECOPACK2 compliant packages