TC1782F320F180HRBAKXUMA2

Key features

• High-performance 32-bit super-scalar TriCore V1.3.1 CPU with 4-stage pipeline
• Superior real-time performance
• Strong bit handling
• Fully integrated DSP capabilities
• Single precision Floating Point Unit (FPU)
• 180 MHz operation at full temperature range
• 32-bit Peripheral Control Processor with single cycle instruction (PCP2)
• 16 Kbyte Parameter Memory (PRAM)
• 32 Kbyte Code Memory (CMEM)
• 180 MHz operation at full temperature range
• Multiple on-chip memories
• 2.5 Mbyte Program Flash Memory (PFLASH) with ECC
• 128 Kbyte Data Flash Memory (DFLASH) usable for EEPROM emulation
• 128 Kbyte Data Memory (LDRAM)
• Instruction Cache: up to 16 Kbyte (ICACHE, configurable)
• 40 Kbyte Code Scratchpad Memory (SPRAM)
• Data Cache: up to 4 Kbyte (DCACHE, configurable)
• 8 Kbyte Overlay Memory (OVRAM)
• 16 Kbyte BootROM (BROM)
• 16-Channel DMA Controller
• Sophisticated interrupt system with 2×255 hardware priority arbitration levels serviced by CPU or PCP2
• High performing on-chip bus structure
• 64-bit Local Memory Buses between CPU, Flash and Data Memory
• 32-bit System Peripheral Bus (SPB) for on-chip peripheral and functional units
• One bus bridge (LFI Bridge)
• Versatile On-chip Peripheral Units
• Two Asynchronous/Synchronous Serial Channels (ASC) with baud rate generator parity, framing and overrun error detection
• Three High-Speed Synchronous Serial Channels (SSC) with programmable data length and shift direction
• One serial Micro Second Bus interface (MSC) for serial port expansion to externa power devices
• One High-Speed Micro Link interface (MLI) for serial inter-processor communication
• One MultiCAN Module with 3 CAN nodes and 128 free assignable message objects for high efficiency data handling via FIFO buffering and gateway data transfer (one CAN node supports TTCAN functionality)
• One FlexRayTM module with 2 channels (E-Ray)
• One General Purpose Timer Array Module (GPTA) with additional Local Timer Cell Array (LTCA2) providing a powerful set of digital signal filtering and timer functionality to realize autonomous and complex Input/Output management
• 32 analog input lines for ADC
• 2 independent kernels (ADC0 and ADC1)
• Analog supply voltage range from 3.3 V to 5 V (single supply)
• 4 different FADC input channels
• Channels with impedance control and overlaid with ADC1 inputs
• Extreme fast conversion, 21 cycles of fFADC clock
• 10-bit A/D conversion (higher resolution can be achieved by averaging of consecutive conversions in digital data reduction filter)
• 86 digital general purpose I/O lines (GPIO), 4 input lines Digi