TMS320LF2401AVFS

The TMS320Lx2401A device, a new member of the TMS320C24x generation of digital signal processor (DSP) controllers, is part of the TMS320C2000 platform of fixed-point DSPs. The Lx2401A device offers the enhanced TMS320 DSP architectural design of the C2xx core CPU for low-cost, low-power, and high-performance processing capabilities. Several advanced peripherals, optimized for digital motor and motion control applications, have been integrated to provide a true single-chip DSP controller. While code-compatible with the existing 240x and C24x DSP controller devices, the Lx2401A offers increased processing performance (40 MIPS) and a higher level of peripheral integration.

Applications

• Digital motor and motion control applications

Key features

• High-Performance Static CMOS Technology
• 25-ns Instruction Cycle Time (40 MHz)
• 40-MIPS Performance
• Low-Power 3.3-V Design
• Code-Compatible With 240x and F243/F241/C242
• Instruction Set Compatible With F240
• Up to 8K Words x 16 Bits of Flash EEPROM (2 Sectors) (LF2401A)
• 8K Words x 16 Bits of ROM (LC2401A)
• Programmable “Code-Security” Feature for the On-Chip Flash/ROM
• Up to 1K Words x 16 Bits of Data/Program RAM
• 544 Words of Dual-Access RAM
• Up to 512 Words of Single-Access RAM
• Boot ROM - SCI Bootloader
• Two 16-Bit General-Purpose Timers
• Seven 16-Bit Pulse-Width Modulation (PWM) Channels Which Enable:
• Three-Phase Inverter Control
• Center- or Edge-Alignment of PWM Channels
• Emergency PWM Channel Shutdown With External PDPINTA Pin
• Programmable Deadband (Deadtime) Prevents Shoot-Through Faults
• One Capture Unit for Time-Stamping of External Events
• Input Qualifier for Select Pins
• Synchronized A-to-D Conversion
• Designed for AC Induction, BLDC, Switched Reluctance, and Stepper Motor Control
• Small Foot-Print (7 mm×7 mm) Ideally Suited for Space-Constrained Applications
• Watchdog (WD) Timer Module
• 10-Bit Analog-to-Digital Converter (ADC)
• 5 Multiplexed Input Channels
• 500 ns Minimum Conversion Time
• Selectable Twin 8-State Sequencers Triggered by Event Manager
• Serial Communications Interface (SCI)
• Phase-Locked-Loop (PLL)-Based Clock Generation
• Up to 13 Individually Programmable, Multiplexed General-Purpose Input/Output (GPIO) Pins
• User-Selectable Dual External Interrupts (XINT1 and XINT2)
• Power Management:
• Three Power-Down Modes
• Ability to Power Down Each Peripheral Independently
• Real-Time JTAG-Compliant Scan-Based Emulation, IEEE Standard 1149.1 (JTAG)
• Development Tools Include:
• Texas Instruments (TI) ANSI C Compiler, Assembler/Linker, and Code Composer Studio Debugger
• Evaluation Modules
• Scan-Based Self-Emulation (XDS510)
• Broad Third-Party Digital Motor Control Support
• 32-Pin VF Low-Profile Quad Flatpack (LQFP)
• Extended Temperature Options (A and S)
• A: - 40℃ to 85℃
• S: - 40℃ to 125℃