TMS320LF2407APGEA

The TMS320LF240xA and TMS320LC240xA devices, new members of the TMS320C24x generation of digital signal processor (DSP) controllers, are part of the TMS320C2000 platform of fixed-point DSPs. The 240xA devices offer the enhanced TMS320 DSP architectural design of the C2xx core CPU for low-cost, low-power, and high-performance processing capabilities. Several advanced peripherals, optimized for digital motor and motion control applications, have been integrated to provide a true single-chip DSP controller. While code-compatible with the existing C24x DSP controller devices, the 240xA offers increased processing performance (40 MIPS) and a higher level of peripheral integration.

Applications

• Digital motor and motion control applications
• Multiple motor and/or converter control

Key features

• High-Performance Static CMOS Technology
• 25-ns Instruction Cycle Time (40 MHz)
• 40-MIPS Performance
• Low-Power 3.3-V Design
• Based on TMS320C2xx DSP CPU Core
• Code-Compatible With F243/F241/C242
• Instruction Set and Module Compatible With F240
• Flash (LF) and ROM (LC) Device Options
• Up to 32K Words x 16 Bits of Flash EEPROM (4 Sectors) or ROM
• Programmable “Code-Security” Feature for the On-Chip Flash/ROM
• Up to 2.5K Words x 16 Bits of Data/Program RAM
• 544 Words of Dual-Access RAM
• Up to 2K Words of Single-Access RAM
• Boot ROM (LF240xA Devices)
• Up to Two Event-Manager (EV) Modules (EVA and EVB), Each Includes:
• Two 16-Bit General-Purpose Timers
• Eight 16-Bit Pulse-Width Modulation (PWM) Channels Which Enable:
• Three-Phase Inverter Control
• Center- or Edge-Alignment of PWM Channels
• Emergency PWM Channel Shutdown With External PDPINTx Pin
• Programmable Deadband (Deadtime) Prevents Shoot-Through Faults
• Three Capture Units for Time-Stamping of External Events
• Input Qualifier for Select Pins
• On-Chip Position Encoder Interface Circuitry
• Synchronized A-to-D Conversion
• Designed for AC Induction, BLDC, Switched Reluctance, and Stepper Motor Control
• Applicable for Multiple Motor and/or Converter Control
• External Memory Interface (LF2407A)
• 192K Words x 16 Bits of Total Memory: 64K Program, 64K Data, 64K I/O
• Watchdog (WD) Timer Module
• 10-Bit Analog-to-Digital Converter (ADC)
• 8 or 16 Multiplexed Input Channels
• 500-ns MIN Conversion Time
• Selectable Twin 8-State Sequencers Triggered by Two Event Managers
• Controller Area Network (CAN) 2.0B Module (LF2407A, 2406A, 2403A)
• Serial Communications Interface (SCI)
• 16-Bit Serial Peripheral Interface (SPI) (LF2407A, 2406A, LC2404A, 2403A)
• Phase-Locked-Loop (PLL)-Based Clock Generation
• Up to 40 Individually Programmable, Multiplexed General-Purpose Input/Output (GPIO) Pins
• Up to Five External Interrupts (Power Drive Protection, Reset, Two Maskable Interrupts)
• Power Management:
• Three Power-Down Modes
• Ability to Power Down Each Peripheral Independently
• Real-Time JTAG-Compliant Scan-Based Emulation, IEEE Standard 1149.1 (JTAG)
• Extended Temperature Options (A and S)
• A: - 40℃ to 85℃
• S: - 40℃ to 125℃