74AUP1G332GW,125

Schmitt trigger 800mV~3.6V 6.7ns@3.3V,30pF 1.4uA TSSOP-6-1.3mm Gates and Inverters RoHS

TSSOP-6-1.3mmROHS3 CompliantActive

Low-power 3-input OR-gate

Manufacturer: Nexperia
Manufacturer part #: 74AUP1G332GW,125
Store part #: C545837
Package / case: TSSOP-6-1.3mm
Category: Gates and Inverters
Packaging: Tape & Reel (TR)

Datasheet (PDF)

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6 in stock

#C545837

Stock & price checked 30 h ago

Quantity	Unit price	Pack price
1+	₹53.45	₹53.45
10+	₹52.19	₹521.90
30+	₹51.35	₹1,540.50
100+	₹50.50	₹5,050.00

Quantity (min 1)

1 × ₹53.45

₹53.45

excl. GST

₹63.07 incl. 18% GST

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Standard pack: 3,000 per reel

74AUP1G332GW,125

₹53.45 for 1 + GST

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Specifications

Input Type: Schmitt trigger
Logic Family: 74AUP
Voltage - Supply: 800mV~3.6V
Propagation Delay: 6.7ns@3.3V,30pF
Output Logic Level - Low: 500mV
Features: Local shutdown mode;Overvoltage-tolerant input
Operating Temperature: -40℃~+125℃
Quiescent Current(Iq): 1.4uA
Current - Output High(IOH): 4mA
Number of Channels: 3;1
Current - Output Low(IOL): 4mA

Packaging & compliance

RoHS: ROHS3 Compliant
Lifecycle: Active
ECCN: EAR99
Packaging: Tape & Reel (TR)
Standard pack: 3,000 / Reel
Sold per: Piece
Minimum order: 1
Unit weight: 0.037 g

Overview

The 74AUP1G332 is a single 3-input OR gate. Schmitt-trigger action at all inputs makes the circuit tolerant of slower input rise and fall times. This device ensures very low static and dynamic power consumption across the entire VCC range from 0.8 V to 3.6 V. This device is fully specified for partial power down applications using lOFF. The lOFF circuitry disables the output, preventing the potentially damaging backflow current through the device when it is powered down.

Key features

Wide supply voltage range from 0.8 V to 3.6 V
CMOS low power dissipation
High noise immunity
Complies with JEDEC standards: JESD8-12 (0.8 V to 1.3 V), JESD8-11 (0.9 V to 1.65 V), JESD8-7 (1.65 V to 1.95 V), JESD8-5 (2.3 V to 2.7 V), JESD8C (2.7 V to 3.6 V)
Low static power consumption; ICC = 0.9 μA (maximum)
Latch-up performance exceeds 100 mA per JESD 78 Class II
Overvoltage tolerant inputs to 3.6 V
Low noise overshoot and undershoot <10 % of VCC
IOFF circuitry provides partial Power-down mode operation
ESD protection: HBM: ANSI/ESDA/JEDEC JS-001 class 3A exceeds 5000 V, CDM: ANSI/ESDA/JEDEC JS-002 class C3 exceeds 1000 V
Multiple package options
Specified from -40 ℃ to +85 ℃ and -40 ℃ to +125 ℃