Varnitronics
Nexperia

74LVC3G06GT,115

Schmitt trigger 1.65V~5.5V 2.9ns@5V,50pF 4uA 3 XSON-8(1x2) Gates and Inverters RoHS

XSON-8(1x2)ROHS3 CompliantActive

Triple inverter with open-drain output

Manufacturer
Nexperia
Manufacturer part #
74LVC3G06GT,115
Store part #
C548750
Package / case
XSON-8(1x2)
Packaging
Tape & Reel (TR)
Datasheet (PDF)

Every Order Guarantee

100% Authentic · 30-Day Return or Replacement · policy

20 in stock

#C548750

Stock & price checked 33 h ago

QuantityUnit pricePack price
1+₹28.50₹28.50
10+₹27.86₹278.60
30+₹27.43₹822.90
100+₹26.99₹2,699.00

1 × ₹28.50

₹28.50

excl. GST

₹33.63 incl. 18% GST

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  • Dispatch in 15-18 working days
  • GST invoice with every order
  • Standard pack: 5,000 per reel

74LVC3G06GT,115

₹28.50 for 1 + GST

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Specifications

output type
Open-drain
Input Type
Schmitt trigger
Logic Family
74LVC
Voltage - Supply
1.65V~5.5V
Propagation Delay
2.9ns@5V,50pF
Features
Power shutdown protection;Noise suppression function
Input Logic Level - Low
700mV~800mV
Operating Temperature
-40℃~+125℃
Input Logic Level - High
1.7V~2V
Quiescent Current(Iq)
4uA
Number of Channels
3
Current - Output Low(IOL)
32mA

Packaging & compliance

RoHS
ROHS3 Compliant
Lifecycle
Active
ECCN
EAR99
Packaging
Tape & Reel (TR)
Standard pack
5,000 / Reel
Sold per
Piece
Minimum order
1
Unit weight
0.024 g

Overview

The 74LVC3G06 is a triple inverter with open-drain outputs. Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of these devices as translators in mixed 3.3 V and 5 V environments. Schmitt-trigger action at all inputs makes the circuit tolerant of slower input rise and fall times. This device is fully specified for partial power down applications using IOFF. The IOFF circuitry disables the output, preventing the potentially damaging backflow current through the device when it is powered down.

Key features

  • Wide supply voltage range from 1.65 V to 5.5 V
  • Overvoltage tolerant inputs to 5.5 V
  • High noise immunity
  • -24 mA output drive (VCC = 3.0 V)
  • CMOS low power consumption
  • Latch-up performance exceeds 250 mA
  • Direct interface with TTL levels
  • IOFF circuitry provides partial Power-down mode operation
  • Complies with JEDEC standard: JESD8-7 (1.65 V to 1.95 V), JESD8-5 (2.3 V to 2.7 V), JESD8-B/JESD36 (2.7 V to 3.6 V)
  • ESD protection: HBM: ANSI/ESDA/JEDEC JS-001 class 2 exceeds 2000 V; CDM: ANSI/ESDA/JEDEC JS-002 class C3 exceeds 1000 V
  • Multiple package options
  • Specified from -40 ℃ to +85 ℃ and -40 ℃ to +125 ℃

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