Varnitronics
CD74AC86M96 TI
TI

CD74AC86M96

1.5V~5.5V 10.8ns@5V,50pF 4uA SOIC-14 Gates and Inverters RoHS

SOIC-14ROHS3 CompliantActive

QUADRUPLE 2-INPUT EXCLUSIVE-OR GATE

Manufacturer
TI
Manufacturer part #
CD74AC86M96
Store part #
C2865775
Package / case
SOIC-14
Packaging
Tape & Reel (TR)
Datasheet (PDF)

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10 in stock

#C2865775

Stock & price checked 28 h ago

QuantityUnit pricePack price
1+₹105.28₹105.28
10+₹102.48₹1,024.80
30+₹100.75₹3,022.50
100+₹98.80₹9,880.00

1 × ₹105.28

₹105.28

excl. GST

₹124.23 incl. 18% GST

Need volume or a scheduled delivery? Request a quote
  • Dispatch in 15-18 working days
  • GST invoice with every order
  • Standard pack: 2,500 per reel

CD74AC86M96

₹105.28 for 1 + GST

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Specifications

Logic Family
74AC Series
Voltage - Supply
1.5V~5.5V
Output Logic Level - Low
100mV;360mV
Propagation Delay
10.8ns@5V,50pF
Input Logic Level - Low
300mV~1.65V
Operating Temperature
-55℃~+125℃
Input Logic Level - High
1.2V~3.85V
Output Logic Level - High
1.4V;2.9V;4.4V;2.58V;3.94V
Quiescent Current(Iq)
4uA
Current - Output High(IOH)
24mA
Number of Channels
4;2
Current - Output Low(IOL)
24mA

Packaging & compliance

RoHS
ROHS3 Compliant
Lifecycle
Active
ECCN
EAR99
Packaging
Tape & Reel (TR)
Standard pack
2,500 / Reel
Sold per
Piece
Minimum order
1
Unit weight
0.51 g

Overview

The CD74AC86 is a quad 2-input exclusive-OR gate. The device implements the Boolean function Y = A ⊕ B or Y = Ā·B + A·B̄ in positive logic. A common application of this device is as a true/complement element: when one input is LOW, the signal at the other input passes through in true form; when one input is HIGH, the signal at the other input is complemented at the output. XOR gates have many applications, some of which can be better represented by alternative logic symbols. There are five equivalent XOR symbols applicable to the CD74AC86 positive-logic exclusive-OR gate, with negation permitted at any two terminals. Logic identity element: output is active LOW when all inputs are at the same logic level (i.e., A = B). Even-parity element: output is active LOW when an even number of inputs (i.e., 0 or 2) are active. Odd-parity element: output is active HIGH when an odd number of inputs (i.e., 1 out of 2 inputs) are active.

Applications

  • True/complement unit
  • Logic recognition unit
  • Even parity unit
  • Odd parity unit

Key features

  • 1.5 V to 5.5 V operation with balanced noise immunity at 30% of supply voltage
  • Speed comparable to bipolar F, AS, and S series with significantly reduced power consumption
  • Balanced propagation delay
  • ±24 mA output drive current
  • Fan-out up to 15 F devices
  • SCR latch-up resistant CMOS process and circuit design

Alternatives

Similar parts — check the datasheet before substituting.

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