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R5F523T3ADFM#30 RENESAS
RENESAS

R5F523T3ADFM#30

RX 32 Bit 40MHz LQFP-64(10x10) Microcontrollers RoHS

LQFP-64(10x10)ROHS3 CompliantActive

32-bit RX MCUs, built-in FPU, 12-bit ADC, PWM

Manufacturer
RENESAS
Manufacturer part #
R5F523T3ADFM#30
Store part #
C1341845
Package / case
LQFP-64(10x10)
Packaging
Tray
Datasheet (PDF)

Every Order Guarantee

100% Authentic · 30-Day Return or Replacement · policy

10 in stock

#C1341845

Stock & price checked 14 h ago

QuantityUnit pricePack price
1+₹588.71₹588.71
10+₹574.43₹5,744.30
30+₹565.05₹16,951.50
100+₹555.67₹55,567.00

1 × ₹588.71

₹588.71

excl. GST

₹694.68 incl. 18% GST

Need volume or a scheduled delivery? Request a quote
  • Dispatch in 15-18 working days
  • GST invoice with every order
  • Standard pack: 160 per tray

R5F523T3ADFM#30

₹588.71 for 1 + GST

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Specifications

ADC (Bit)
12bit
Number of I/O
48
Operating Temperature
-40℃~+85℃
Program Memory Type
FLASH
Voltage - Supply
2.7V~5.5V
Program Storage Size
64KB
CPU Core
RX
Core Size
32 Bit
CPU Maximum Speed
40MHz
Oscillator Type
Built-in

Packaging & compliance

RoHS
ROHS3 Compliant
Lifecycle
Active
ECCN
3A991A2
Packaging
Tray
Standard pack
160 / Tray
Sold per
Piece
Minimum order
1
Unit weight
3.02 g

Overview

40-MHz 32-bit RX MCUs, built-in FPU, 65.6 DMIPS, 12-bit ADC (equipped with three S/H circuits, double data registers, and comparator) 40MHz PWM (three-phase complementary output ×2ch)

Applications

  • General industrial and consumer equipment

Key features

  • 32-bit RX CPU core
  • Max. operating frequency: 40 MHz
  • Capable of 65.6 DMIPS in operation at 40 MHz
  • Enhanced DSP: 32-bit multiply-accumulate and 16-bit multiply-subtract instructions supported
  • Built-in FPU: 32-bit single-precision floating point (compliant to IEEE754)
  • Divider (fastest instruction execution takes two CPU clock cycles)
  • Fast interrupt
  • CISC Harvard architecture with 5-stage pipeline
  • Variable-length instructions, ultra-compact code
  • On-chip debugging circuit
  • Memory protection unit (MPU) supported
  • Low power design and architecture
  • Operation from a single 2.7-V to 5.5-V supply
  • Three low power consumption modes
  • On-chip code flash memory, no wait states
  • 128-/64-Kbyte capacities
  • On-board or off-board user programming
  • On-chip SRAM, no wait states
  • 12 Kbytes of SRAM
  • DMA
  • DTC: Four transfer modes
  • Reset and supply management
  • Seven types of reset, including the power-on reset (POR)
  • Low voltage detection (LVD) with voltage settings
  • Clock functions
  • Main clock oscillator frequency: 1 to 20 MHz
  • External clock input frequency: Up to 20 MHz
  • PLL circuit input: 4 MHz to 12.5 MHz
  • On-chip low-speed oscillator, on-chip high-speed oscillator, dedicated on-chip oscillator for the IWDT
  • Clock frequency accuracy measurement circuit (CAC)
  • Independent watchdog timer
  • 15-kHz on-chip oscillator produces a dedicated clock signal to drive IWDT operation.
  • Useful functions for IEC60730 compliance
  • Self-diagnostic and disconnection-detection assistance functions for the A/D converter, clock frequency accuracy measurement circuit, independent watchdog timer, RAM test assistance functions using the DOC, etc.
  • MPC
  • Multiple locations are selectable for I/O pins of peripheral functions
  • Up to 4 communications channels
  • SCI with many useful functions (2 channels) Asynchronous mode, clock synchronous mode, smart card interface mode, simplified SPI, simplified I²C, and extended serial mode.
  • I²C bus interface: Transfer at up to 400 kbps (one channel)
  • RSPI capable of high speed connection (one channel)
  • Up to 12 extended-function timers
  • 16-bit MTU3: 40MHz operation, input capture, output compare, three-phase complementary PWM output, CPU-efficient complementary PWM, phase counting mode (six channels)
  • 8-bit TMRs (4 channels)
  • 16-bit compare-match timers (4 channels)
  • 12-bit A/D converter: 10ch
  • On-chip sample-and-hold circuit: 12bit × up to 3 channels
  • Sampling time can be set for each channel
  • Self-diagnostic function and analog input disconnection detection assistance function (compliant to IEC60730)
  • ADC: three sample-and-hold circuits, double data registers, comparator (3 channels)
  • Register write protection function can protect values in important registers against overwriting.
  • Up to 50 pins for general I/O ports
  • 5-V tolerant, open drain, input pull-up
  • Operating temperature range
  • -40 to +85℃
  • -40 to +105℃

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