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RM57L843BZWTT

ARM Cortex-R5F 16/32 Bit 330MHz NFBGA-337 Microcontrollers RoHS

NFBGA-337ROHS3 CompliantActive

Hercules microcontroller based on ARM Cortex-R core

Manufacturer
TI
Manufacturer part #
RM57L843BZWTT
Store part #
C1346052
Package / case
NFBGA-337
Packaging
Tray
Datasheet (PDF)

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#C1346052

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QuantityUnit pricePack price
1+₹12,354.40₹12,354.40
30+₹11,797.03₹3,53,910.90

1 × ₹12,354.40

₹12,354.40

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₹14,578.19 incl. 18% GST

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RM57L843BZWTT

₹12,354.40 for 1 + GST

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Specifications

ADC (Bit)
10bit;12bit
Number of I/O
145
Operating Temperature
-40℃~+105℃
Voltage - Supply
1.14V~3.6V
Program Memory Type
FLASH
EEPROM
128KB
Program Storage Size
4MB
CPU Core
ARM Cortex-R5F
Core Size
16/32 Bit
CPU Maximum Speed
330MHz
Oscillator Type
External

Packaging & compliance

RoHS
ROHS3 Compliant
Lifecycle
Active
ECCN
3A991A2
Packaging
Tray
Standard pack
90 / Tray
Sold per
Piece
Minimum order
1
Unit weight
0.001 g

Overview

The RM57L843 device belongs to the high-performance ARM Cortex - R-based MCUs of the Hercules RM series. This device is equipped with comprehensive documentation, tools, and software to assist in the development of IEC 61508 functional safety applications. The RM57L843 device features on-chip diagnostic characteristics, specifically including: dual CPUs in lockstep; built-in self-test (BIST) logic for the CPU, N2HET coprocessor, and on-chip SRAM; ECC protection on the L1 cache, L2 flash, and SRAM memory. In addition, the device also provides ECC or parity protection for peripheral memory and has a loopback function on peripheral I/Os. The RM57L843 device integrates two ARM Cortex - R5F floating-point CPUs operating in lockstep, with an efficiency of up to 1.66 DMIPS/MHz and capable of running at up to 330MHz, thereby providing a performance of up to 547 DMIPS. The device supports the little-endian [LE] format. The RM57L843 device has 4MB of integrated flash memory and 512KB of data RAM with single-bit error correction and double-bit error detection capabilities. The flash memory on this device is an electrically erasable and programmable non-volatile memory with a 64-bit wide data bus interface. For all read, programming, and erase operations, the flash operates at a 3.3V power supply input (the same level as the I/O power supply). The SRAM supports read/write access in byte, half-word, and word modes. The RM57L843 device has peripherals for real-time control applications, including two next-generation high-end timer (N2HET) timing coprocessors with a total of up to 64 I/O pins. The N2HET is an advanced intelligent timer capable of providing precise timing functions for real-time applications. This timer is software-controlled and has a dedicated timer microcontroller and a connected I/O port. The N2HET can be used for pulse-width modulation output, capture or comparison input, or GPIO. The N2HET is particularly suitable for applications that require information from multiple sensors or use complex and accurate time pulses to drive actuators. The high-end timer transfer unit (HTU) can perform DMA-type transactions to transfer N2HET data to and from the main memory. The HTU has a built-in memory protection unit (MPU). The enhanced pulse-width modulator (ePWM) module can generate complex pulse-width waveforms with minimal CPU overhead or intervention. The ePWM is easy to use and supports high-side and low-side PWM as well as dead-time generation. The ePWM integrates trigger zone protection and is synchronized with the on-chip MibADC, making it ideal for digital motor control applications. If the system focuses on the timely capture of external events, the enhanced capture (eCAP) module is essential. The eCAP can also be used to monitor ePWM output or easily generate PWM when the application does not require capture. The enhanced quadrature encoder pulse (eQEP) module directly connects to a linear or rotary incremental encoder to obtain position, direction, and speed information from the rotating machinery in a high-performance motion and position control system. The device has two 12-bit resolution MibADCs, with a total of 41 channels and a 64-word buffer RAM with parity protection. The MibADC channels can be independently converted or grouped by software for special conversion sequences. Sixteen channels can be shared between the two MibADCs. Each MibADC supports three independent groups. Each sequence can be converted once when triggered or configured to execute in continuous conversion mode. The MibADC has a 10-bit mode, which is compatible with earlier devices and can be used when a higher conversion rate is required. One channel in MibADC1 and two channels in MibADC2 can be used to convert temperature measurements from three on-chip temperature sensors. The device has multiple communication interfaces: five MibSPI; four UART (SCI) interfaces, two of which support LIN; four CAN; two I2C modules; and one Ethernet controller. SPI provides a convenient serial interaction method for high-speed communication between similar shift register type devices. LIN supports the Local Interconnect Network standard (LIN 2.1) and can be used as a full-duplex mode UART using the standard non-return-to-zero (NRZ) format. DCAN supports the CAN 2.0B protocol standard and uses a serial multi-master communication protocol, which effectively supports distributed real-time control for robust communication at a maximum rate of 1Mbps. DCAN is very suitable for applications in noisy and harsh environments (e.g., automotive and industrial fields) that require reliable serial communication or multiplexed wiring. The Ethernet module supports MII, RMII, and management data I/O (MDIO) interfaces. The I2C module is a multi-master communication module that provides an interface (via the I2C serial bus) between the microcontroller and I2C-compatible devices. The I2C module supports rates of 100kbps and 400kbps. The frequency-modulated phase-locked loop (FMPLL) clock module multiplies an external frequency reference by a higher frequency for internal use. The global clock module (GCM) manages the mapping between available clock sources and internal device clock domains. The device also has two external clock prescaler (ECP) modules. When the ECP is enabled, it outputs a continuous external clock on the ECLK1 and ECLK2 bond balls. The ECLK frequency is a user-programmable ratio of a peripheral interface clock (VCLK) frequency. This low-frequency output, which can be externally monitored, serves as an indicator of the device's operating frequency. The direct memory access (DMA) controller has 32 channels, 48 peripheral requests, and ECC protection for its memory. The DMA has a built-in MPU to protect the memory from erroneous transmissions. The error signaling module (ESM) monitors on-chip device errors and determines whether to trigger an interrupt or an external error pin/bond ball (nERROR) when a fault is detected. The nERROR signal can be externally monitored as an indicator of fault conditions within the microcontroller. The device includes a parameter override module (POM) to enhance the debugging function of the application code. The POM can reroute flash access to internal RAM or EMIF, thereby avoiding reprogramming for parameter updates in the flash. This function is particularly useful during the calibration process of real-time systems. The device implements several interfaces to enhance the debugging function of the application code. In addition to the built-in ARM Cortex - R5F CoreSight debugging features, the embedded cross-trigger (ECT) supports the interaction and synchronization of multiple trigger events within the SoC. The external trace macrocell (ETM) provides instruction and data tracing for program execution. For instrumentation purposes, a RAM trace port module (RTP) is implemented to support high-speed tracing of RAM and peripherals accessed by the CPU or any other master. A data modification module (DMM) provides the function of writing external data to the device memory. The RTP and DMM have very little impact on the program execution time of the application code. With its integrated safety features and various communication and control peripherals, the RM57L843 device is very suitable for high-performance real-time control applications with strict safety requirements.

Applications

  • Industrial safety applications
  • Industrial automation
  • Industrial motor drives
  • Safety programmable logic controllers (PLC)
  • Power generation and distribution
  • Turbines and wind turbines
  • Elevators and escalators

Key features

  • High-performance microcontroller for safety-critical applications
  • Dual-core lockstep CPU with ECC-protected cache
  • ECC on flash and RAM interfaces
  • Built-in self-test for CPU, high-end timers, and on-chip RAM
  • Error Signaling Module (ESM) with error pin
  • Voltage and clock monitoring
  • ARM Cortex-R5F 32-bit RISC CPU
  • Single- and double-precision FPU
  • 16-region Memory Protection Unit (MPU)
  • 32KB instruction cache and 32KB data cache (ECC-supported)
  • Open architecture with third-party support
  • Operating condition: CPU clock up to 330MHz
  • Core supply voltage (VCC): 1.14V to 1.32V
  • I/O supply voltage (VCCIO): 3.0V to 3.6V
  • Integrated memory: 4MB program flash with ECC
  • 512KB RAM with ECC
  • 128KB data flash (EEPROM emulation) with ECC
  • 16-bit External Memory Interface (EMIF)
  • Hercules common platform architecture: consistent memory map across family
  • Real-Time Interrupt (RTI) timer (OS timer)
  • Two 128-channel Vector Interrupt Modules (VIM) with vector table ECC protection
  • VIM1 and VIM2 operating in safety lockstep mode
  • Two dual-channel Cyclic Redundancy Checker (CRC) modules
  • DMA controller: 32 channels and 48 peripheral requests
  • ECC protection on control packet RAM
  • DMA access protected by dedicated MPU
  • Frequency-Modulated Phase-Locked Loop (FMPLL) with built-in cycle slip detector
  • Independent non-modulated PLL
  • IEEE 1149.1 JTAG, boundary scan, and ARM CoreSight components
  • Advanced JTAG Security Module (AJSM)
  • Trace and calibration features: ETM, RTP, DMM, POM
  • Multiple communication interfaces: 10/100Mbps Ethernet MAC (EMAC)
  • IEEE 802.3 compliant (3.3V I/O only)
  • MII, RMII, and MDIO support
  • Four CAN controller (DCAN) modules
  • 64 mailboxes with ECC protection
  • CAN protocol 2.0B compliant
  • Two I2C modules
  • Five Multi-buffered Serial Peripheral Interface (MibSPI) modules
  • MibSPI1: 256 words with ECC protection
  • Other MibSPI: 128 words with ECC protection
  • Four UART (SCI) interfaces, two with LIN 2.1 support
  • Two Next Generation High-End Timer (N2HET) modules
  • 32 programmable channels per module
  • 256-word instruction RAM with parity
  • Hardware angle generator per N2HET
  • Dedicated High-End Timer Transfer Unit (HTU) per N2HET
  • Two 12-bit Multi-buffered ADC (MibADC) modules
  • MibADC1: 32 channels + control for up to 1024 off-chip channels
  • MibADC2: 25 channels
  • 16 shared channels
  • 64 result buffers with parity protection
  • Enhanced timer peripherals: seven ePWM modules
  • Six eCAP modules
  • Two eQEP modules
  • Three on-chip temperature sensors
  • Up to 145 GPIO pins
  • 16 dedicated GPIO pins with external interrupt capability
  • Package: 337-ball ZWT BGA [RoHS compliant]

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