SN74LV1T00QDCKRQ1

The SN74LV1T00-Q1 is a single 2-input NAND gate. Each gate performs the Boolean function Y = (A × B)' in positive logic. Output levels are referenced to the supply voltage (VCC), supporting 1.8V, 2.5V, 3.3V, and 5V CMOS logic levels. Inputs feature a lower-threshold circuit design to support level-up translation from lower-voltage CMOS inputs (e.g., 1.2V input to 1.8V output, or 1.8V input to 3.3V output). In addition, the 5V-tolerant input pins support level-down translation (e.g., 3.3V to 2.5V output).

Applications

• Enable or disable digital signals
• Control indicator LEDs
• Switching between communication modules and system controllers

Key features

• AEC-Q100 qualified for automotive applications:
• Device temperature grade 1: -40°C to +125°C
• Device HBM ESD classification level 2
• Device CDM ESD classification level C4B
• Wide operating range: 1.8V to 5.5V
• Single-supply voltage translator (refer to LVxT enhanced input voltage):
• Up translation:
• 1.2V to 1.8V
• 1.5V to 2.5V
• 1.8V to 3.3V
• 3.3V to 5.0V
• Down translation:
• 5.0V, 3.3V, 2.5V to 1.8V
• 5.0V, 3.3V to 2.5V
• 5.0V to 3.3V
• 5.5V tolerant input pins
• Standard pinout supported
• Up to 150Mbps at VCC = 5V or 3.3V
• Latch-up performance exceeds 250mA per JESD 17