SN74LV86ADR

The LV86A device is a quad 2-input exclusive-OR gate designed for 2 V to 5.5 V VCC operation. These devices contain four independent 2-input XOR gates that perform the Boolean function Y = A⊕B or Y = A̅B + AB̅ with positive logic. A common application is as a true/complement element: if one input is LOW, the signal on the other input is reproduced in true form at the output; if one input is HIGH, the signal on the other input is reproduced in complemented form at the output. XOR gates have multiple applications, some of which are better represented by alternative logic symbols. There are five equivalent XOR symbols applicable to the LV86A positive-logic gate, with negation permitted on any two ports. The output logic rules are as follows:- Logic identity element: output is asserted LOW when all inputs are at the same logic level (i.e., A = B)- Even-parity element: output is asserted LOW when an even number of inputs (i.e., 0 or 2) are at the active level- Odd-parity element: output is asserted HIGH when an odd number of inputs (i.e., 1 out of 2 inputs) are at the active level

Applications

• True/complement unit
• Logic identity unit
• Even parity unit
• Odd parity unit

Key features

• Mixed-mode voltage operation on all ports
• Latch-up performance exceeds 250 mA per JESD 17
• ESD protection performance exceeds JESD 22 requirements
• 2000-V HBM (A114-A) ESD withstand capability
• 200-V MM (A115-A) ESD withstand capability
• 1000-V CDM (C101) ESD withstand capability